Message-ID: <2602148.1075845221869.JavaMail.evans@thyme> Date: Mon, 4 Jun 2001 16:24:36 -0700 (PDT) From: alerts@alerts.equityalert.com.simbra.net To: alewis@ect.enron.com Subject: Your News Alert for BRCM Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: quoted-printable X-From: "Equity Alert Center" @ENRON X-To: Andrew Lewis X-cc: X-bcc: X-Folder: \Lewis, Andrew H.\Lewis, Andrew H.\Deleted Items X-Origin: LEWIS-A X-FileName: Lewis, Andrew H..pst [IMAGE]=09[IMAGE]=09[IMAGE]=09 Market Watch [IMAGE] Largest Short Postition Decreases [IMAGE] La= rgest Short Postition Increases [IMAGE] Lock-up Expiry Dates [IMAGE] = IPO Quiet Periods Expiries [IMAGE] IPO Withdrawals [IMAGE] Analyst = EPS Change - Upside [IMAGE] Analyst EPS Change - Downside [IMAGE] Hig= hest Analyst Activity [IMAGE] Earnings Calendar - This Week [IMAGE]= Upcoming Splits [IMAGE] Stock Splits [IMAGE] Coverage Initiation = [IMAGE] Coverage Re-Iteration HelpDesk [IMAGE] Unsubscribe [IMA= GE] Update my Membership / Profile [IMAGE] Forgot Username / Password = [IMAGE]Add / Edit Alerts [IMAGE]View My Alerts [IMAGE] = =09 As requested, your News Alert for BRCM follows from EquityAlert.com. = Nassda Releases Version 1.3 of HSIM with Billion Transistor Capacity; Na= nometer Full-Chip Circuit Simulator Provides New Analysis and Device Suppor= t SANTA CLARA, Calif., Jun 4, 2001 (BUSINESS WIRE) -- Nassda Corp. today = announced version 1.3 of HSIM(TM), the latest release of the electronic des= ign automation industry's first hierarchical full-chip circuit simulator. T= argeted to designers of analog, mixed-signal, memory and system-on-chip (SO= C) integrated circuits, HSIM provides detailed circuit-level analysis of ti= ming and power behavior, and signal integrity effects. This release deliver= s new analysis and device support along with enhanced interoperability with= other design tools. "I want to commend Nassda for producing such a produ= ct for the memory and mixed signal industry," said Puck Wong of Broadcom Co= rp. "This is truly a significant and substantial development for mixed-sign= al circuit designers. Nassda's support for Broadcom also has been outstandi= ng. We are extremely happy with HSIM." "HSIM version 1.3 further enhances= the accuracy, performance, device model support and nanometer analysis we = offer to designers," said Sang Wang, CEO of Nassda. "Over 80 customers are = using our technology in their design flows. This commercial success has con= firmed our hierarchical approach to circuit analysis for analog, mixed-sign= al, memory and SOC designs. This technology will become even more widely ad= opted by the design community as they move into geometries at 180nm and bel= ow." HSIM Solves Critical Customer Issue HSIM solves the critical issue = of analyzing circuit behavior while taking into account the electrical and = parasitic effects of nanometer scale silicon. Before the availability of HS= IM, design teams were unable to analyze these effects with a tool that had = the speed, accuracy, and capacity that was needed. In a recent benchmark, H= SIM verified a 50 million transistor network processor in just over 13 hour= s on a 32-bit workstation with 512Meg of RAM. HSIM's ability to address cri= tical verification issues is reflected in HSIM's dramatic rate of adoption = by design teams throughout the world. HSIM Technology Nassda created HSI= M to perform full-chip circuit simulation and analysis with accuracy within= 1-2% of SPICE but at speeds three to four orders of magnitude faster than = SPICE. HSIM uses a patent-pending hierarchical technology to deliver a capa= city of over one billion transistors, and is targeted to both pre- and post= -layout analysis of circuits. "HSIM version 1.3 further strengthens our l= eadership in full-chip nanometer circuit simulation and analysis with unpre= cedented performance and capacity," stated Dr. An-Chang Deng, President of = Nassda. "HSIM's capability of annotating both layout parasitic and device g= eometry information to a pre-layout netlist is essential for efficient veri= fication and optimization of design implementations. HSIM enables first sil= icon success." New Device Models HSIM now supports simulation of JFETs, = found in communication designs, using the same model found in SPICE simulat= ors. Another development for designers of high-speed systems is the ability= to analyze signal integrity effects with a lossy transmission line model. = As well, the latest MOS device model from U.C. Berkeley for nanometer-scale= devices, BSIM4, is now supported. The existing silicon-on-insulator (SOI) = device model has been improved in accuracy by working closely with Nassda's= customers. With each new release, HSIM continues to incorporate the latest= developments from industry and academic research. Enhanced Netlist Back-= Annotation HSIM version 1.3 provides enhanced support for the back-annotat= ion of parasitic RC data in DSPF format, and MOS device geometry informatio= n including device size, parasitics and resistivity. Since they account for= post-layout effects, back-annotation of DSPF and MOS device data is necess= ary for accurate analysis of signal integrity, and timing and power behavio= r. New Spectral Analysis With version 1.3, HSIM now provides spectral an= alysis by means of the fast Fourier transform (FFT). Performed interactivel= y or after transient simulation, HSIM enables frequency analysis of communi= cation circuits. This new capability provides industry-standard windowing f= unctions for conditioning the analysis data as needed by designers. Inter= operability HSIM version 1.3 delivers improved interoperability with other= design tools by providing an application programming interface (API) for w= orking with customers' internal waveform viewers. The new release also prov= ides a user modeling interface (UMI) to integrate customer-proprietary devi= ce models. Pricing and Availability HSIM Version 1.3 is now available, a= nd is supported on workstations running Sun Solaris, HP-UX, Microsoft Windo= ws NT/2000, and Linux operating systems. U.S. prices start at $85,000. Ab= out Nassda Nassda Corporation (Santa Clara, California) develops and marke= ts full-chip nanometer circuit simulation and analysis solutions for advanc= ed IC designs, especially for analog, memory and mixed-signal systems-on-a-= chip designs. Nassda's HSIM product is the leading post-layout verification= and analysis tool for achieving first silicon success and improving produc= t quality and production yield. Nassda has sales offices in Europe and Nort= h America, and is represented by distributors in Japan and the rest of Asia= . For more information about Nassda, please check the company's website at = http://www.nassda.com. Note to Editors: HSIM is a trademark of Nassda Cor= poration. All other trademarks and registered trademarks are the property o= f their owners. CONTACT: Nassda Corporation = Graham Bell, 408/562-9168 x229 gbell@n= assda.com or Lee Public Re= lations Pam Wasserman, 650/363-0142 = pam@leepr.com URL: http://www.businesswire.com Today= 's News On The Net - Business Wire's full file on the Internet with Hyperli= nks to your home page. Copyright (C) 2001 Business Wire. All rights reser= ved. -0- KEYWORD: CALIFORNIA INTERNATIONAL EUROPE ASIA PACIFIC = INDUSTRY KEYWORD: SOFTWARE HARDWARE EDA= PRODUCT [IMAGE] ***IMPORTANT NOTICE AND DISCLAIME= R REGARDING THIS COURTESY EMAIL*** At your request, as a subscriber to ou= r service, this email alert is being sent to you as a courtesy and is for i= nformation purposes only. We are a financial news re-distributor. We are= not an investment advisory and do not purport to tell or suggest which c= ompanies you should monitor or which securities you should purchase or sell= . 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